This invention relates, in general, to semiconductor devices, and more particularly, to sensing devices formed as part of an integrated circuit.
Sensing devices such as accelerometers, gyros, pressure sensors, and the like are well known in the art. In order to maximize the functionality of the sensing device, it is desirable to form the sensing element on a substrate with neighboring logic transistors such as field effect transistors (FETs) that monitor the information generated by the sensing element and provide the proper electrical response. To minimize the manufacturing cost of an integrated circuit having a sensing element, it is desirable to integrate the process used to make the sensing element with the process used to make the FETs.
One problem with forming a sensing element on the same substrate that is used to form FETs is that the topography commonly associated with sensing elements complicates the photolithographic process used to define the FETs. Commonly, sensing elements have topographies that are in excess of a micron. Such topography makes it difficult to evenly dispense photoresist across a substrate and requires a photolithographic process that has a depth of focus that is sufficient to resolve the topography.
Presently, there are two unrelated approaches to solving this problem. The first approach forms a layer of epitaxial silicon on a substrate. Bipolar transistors are formed in the epitaxial silicon layer and a sensor is carved out of the epitaxial layer. An example of this approach is shown in a paper by P. T. Gennissen et al., "Applications of bipolar compatible epitaxial polysilicon", SPIE Vol. 2882, pages 59-65. However, this technique involves the added complexity of forming epitaxial layers and provides only limited electrical isolation between the sensor and the epitaxial layer.
An example of a different approach is shown in a paper by J. H. Smith et al., "Embedded Micro mechanical Devices for the Monolithic Integration of MEMS with CMOS", Proc. 1995 IEDM, pages 609-612. In general, this alternative approach relies on the simplicity of complementary metal-oxide semiconductor (CMOS) processing steps to form a sensor in a recessed cavity. However, this approach is limited to the capability of conventional chemical vapor deposition (CVD) techniques. In particular, CVD processes are limited in the thickness of the films that can be formed. Consequently, sensors formed with this approach are limited in their maximum size and topography.
Accordingly, a need exists to provide a method of forming an integrated circuit that has a sensing element that obviates the problems associated with the topography of the sensing element. Such a device would be less complicated to fabricate, and thus, could be made more reliably and at a lower manufacturing cost than previously known devices.